Nong's Old Publications

Papers

  1. G. Nong, M Hamdi and J. K. Muppala, Performance Evaluation of Multiple Input-Queued ATM Switches with PIM Scheduling under Bursty Traffic, IEEE Transactions on Communications, Volume 49, Issue 8, Aug. 2001, pp. 1329-1333.
  2. G. Nong, J.K. Muppala and M. Hamdi, Analysis of Non-blocking ATM Switches with Multiple Input Queues, IEEE/ACM Transactions on Networking, Vol.7, Feb. 1999.
  3. G. Nong and M. Hamdi, On the Provision of Quality-of-Service Guarantees for input-Queued Switches, IEEE Communication Magazine, December 2000.
  4. G. Nong and M. Hamdi, Burst-Based Scheduling Algorithms for Non-blocking ATM Switches with Multiple Input Queues, IEEE Communication Letters, Vol. 4, No. 6, pp. 202-204, June 2000.
  5. G. Nong, M. Hamdi and J.K. Muppala, Performance Evaluation of a Scheduling Algorithm for Multiple Input-Queued ATM Switches, Informatica, Vol.23, No.3, pp. 369-381, Sept. 1999.
  6. G. Nong, J.K. Muppala and M. Hamdi, Performance Analysis of Input Queueing ATM Switches with Parallel Iterative Matching Scheduling, The Fourth IFIP Book on ATM Networks.
  7. G. Nong and M. Hamdi, Providing QoS Guarantees for Unicast/multicast Traffic with Fixed and Variable Length Packets in Multiple Input-queued Switches, Proceedings of Sixth IEEE Symposium on Computers and Communications, 2001, pp. 166 -171
  8. G. Nong and M. Hamdi, On the Provision of Integrated QoS Guarantees of Unicast and Multicast Traffic in Input-Queued Switches, GlobeCom'99 (Symposia on Global Internet), pp. 1742-1747.
  9. G. Nong, M. Hamdi and J. K. Muppala, Analytical Analysis of ATM Switches with Multiple Input Queues with Bursty Traffic, GlobeCom'99, pp. 1222-1226.
  10. G. Nong, M. Hamdi and K. B. Letaief, Efficient Scheduling of Variable-Length IP Packets on High Speed Switches, GlobeCom'99, pp. 1407-1411.
  11. G. Nong, M. Hamdi and J. K. Muppala, Analytical Modeling of A High-Speed Scheduling Algorithm for Multiple Input-Queued ATM Switches, International Conference on Broadband Switching Systems (BSS '99).
  12. G. Nong, J. K. Muppala and M. Hamdi, Analysis of Non-blocking ATM Switches with Multiple Input Queues, GlobeCom'97, pp. 531-535.
  13. G. Nong, J. K. Muppala and M. Hamdi, A Performance Model for ATM Switches with Multiple Input Queues, Sixth International Conference on Computer Communications and Networks, (IC3N)'97, pp. 222-227.

Patents

Granted£º

  1. G. Nong, Frame assembly circuit for use in a scalable shared queuing switch and method of operation, USPTO (US Patent & Trademark Offic), No.: 7,206,325, April 17, 2007.
  2. G. Nong, Apparatus for switching data in high-speed networks and method of operation, USPTO (US Patent & Trademark Office), No.: 7,154,885, December 26, 2006.
  3. G. Nong, Packet buffer circuit and method, USPTO (US Patent & Trademark Office), No.: 6,885,591, April 26, 2005.

Pending£º

  1. G. Nong, Scalable Two-Stage Virtual Output Queuing Switch and Method of Operation, USPTO No.: 20030123469A1, July 3, 2003.